2.4) AVR Memory Map and CPU Registers

posted by Hamid Sayyed • November 09, 2025 0 Comments

Every microcontroller follows a particular internal structure that decides how it stores instructions, handles variables, and controls hardware. In AVR architecture, understanding the memory map and register organisation is extremely important because it directly impacts speed, efficiency, and how you program the chip. The memory map divides different types of memory such as Flash, EEPROM, SRAM, and I/O registers into distinct regions. Each region plays a specific role — Flash holds the program code, SRAM holds variables and the stack, and EEPROM keeps data even after power is removed. The CPU registers, on the other hand, are like the immediate working hands of the processor, allowing most instructions to execute within a single clock cycle. Together, these two sections — memory and registers — form the foundation of all operations inside an AVR microcontroller. Once you learn how these parts interact, debugging and optimising embedded programs becomes much easier.

AVR Memory Map — Complete Overview

AVR uses a Modified Harvard architecture where program and data memories are separate. This allows the microcontroller to fetch instructions and data at the same time, which increases processing speed. The memory is organised as:

  • Flash Memory: Non-volatile program storage (e.g., 16 KB in ATmega16).
  • SRAM: Fast read-write memory for variables and the program stack.
  • EEPROM: Non-volatile data memory for long-term storage.
  • I/O and Special Function Registers (SFRs): Control peripherals like timers, ports, ADC, UART, etc.
Diagram: AVR Memory Map showing data and program spaces.

Detailed Explanation of Memory Sections

Program Memory (Flash): This is non-volatile, meaning its contents remain intact even when power is turned off. The AVR fetches instructions from here using the Program Counter (PC). You can also store constant lookup tables or strings using the `PROGMEM` keyword in C.

EEPROM: Used for storing configuration data like calibration values or user preferences. Unlike Flash, EEPROM can be written or erased at the byte level, but it has limited write cycles (around 100,000 times).

SRAM: Used for variables, temporary data, and the program stack. The stack grows downward, so improper memory allocation can cause stack overflow and overwrite data.

I/O & SFR: This section contains registers for controlling timers, serial communication, ADC, and other peripherals. These registers are mapped into the lower address region of data memory, making them directly accessible.

CPU Register File

AVR has 32 general-purpose registers (R0–R31) that form the CPU register file. Most arithmetic, logic, and data movement instructions use these registers directly, which makes the AVR architecture very efficient. The first 32 bytes of data memory represent these registers, and they can also be used for indirect addressing through index registers (X, Y, Z).

Diagram: CPU Register File and Special Registers.

Status Register (SREG) — Flag Meanings

BitFlagDescription
7IGlobal Interrupt Enable
6TTemporary storage bit
5HHalf Carry (used in BCD)
4SSign flag (N ⊕ V)
3VOverflow flag
2NNegative flag
1ZZero flag
0CCarry flag
Tip: When writing Interrupt Service Routines (ISRs), always save and restore SREG if your routine modifies arithmetic flags, as these can affect program logic.

Conclusion

Understanding AVR’s memory map and register layout helps developers write optimised, bug-free programs. You can manage program space, variable space, and stack usage efficiently, while using registers to perform most operations in one clock cycle. Mastering these fundamentals makes it much easier to debug embedded applications and improve performance.

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